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Zero Drift, Digitally Programmable Instrumentation Amplifier AD8231
FEATURES
Digitally/pin-programmable gain G = 1, 2, 4, 8, 16, 32, 64, or 128 Specified from -40C to +125C 50 nV/C maximum input offset drift 10 ppm/C maximum gain drift Excellent dc performance 80 dB minimum CMR, G = 1 15 V maximum input offset voltage 500 pA maximum bias current 0.7 V p-p noise (0.1 Hz to 10 Hz) Good ac performance 2.7 MHz bandwidth, G = 1 1.1 V/s slew rate Rail-to-rail output Shutdown/multiplex Extra op amp Single-supply range: 3 V to 6 V Dual-supply range: 1.5 V to 3 V
FUNCTIONAL BLOCK DIAGRAM
16 15 14 13 CS A2 A1 A0
NC -INA +INA NC
1 2 3 4 LOGIC
12 11 10 9
+VS -VS OUTA REF
IN-AMP
AD8231
5 6 SDN
OP AMP
7 8
Figure 1.
Table 1. Instrumentation and Difference Amplifiers by Category
High Performance AD8221 AD82201 AD8222 AD82241 Low Cost AD623 1 AD85531 High Voltage AD628 AD629 Mil Grade AD620 AD621 AD524 AD526 AD624 Low Power AD6271 Digital Gain AD82311 AD8250 AD8251 AD85551 AD85561 AD85571
APPLICATIONS
Pressure and strain transducers Thermocouples and RTDs Programmable instrumentation Industrial controls Weigh scales
1
Rail-to-rail output.
GENERAL DESCRIPTION
The AD8231 is a low drift, rail-to-rail, instrumentation amplifier with software-programmable gains of 1, 2, 4, 8, 16, 32, 64, or 128. The gains are programmed via digital logic or pin strapping. The AD8231 is ideal for applications that require precision performance over a wide temperature range, such as industrial temperature sensing and data logging. Because the gain setting resistors are internal, maximum gain drift is only 10 ppm/C for gains of 1 to 32. Because of the auto-zero input stage, maximum input offset is 15 V and maximum input offset drift is just 50 nV/C. CMRR is 80 dB for G = 1, increasing to 110 dB at higher gains. The AD8231 also includes an uncommitted op amp that can be used for additional gain, differential signal driving, or filtering. Like the in-amp, the op amp has an auto-zero architecture, railto-rail input, and rail-to-rail output. The AD8231 includes a shutdown feature that reduces current to a maximum of 1 A. In shutdown, both amplifiers also have a high output impedance, which allows easy multiplexing of multiple amplifiers without additional switches. The AD8231 is specified over the extended industrial temperature range of -40C to +125C. It is available in a 4 mm x 4 mm 16-lead LFCSP.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2007 Analog Devices, Inc. All rights reserved.
06586-001
OUTB
+INB
-INB
AD8231 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 7 Thermal Resistance ...................................................................... 7 Maximum Power Dissipation ..................................................... 7 ESD Caution.................................................................................. 7 Pin Configuration and Function Descriptions............................. 8 Typical Performance Characteristics ............................................. 9 Instrumentation Amplifier Performance Curves..................... 9 Operational Amplifier Performance Curves .......................... 15 Performance Curves Valid for Both Amplifiers ..................... 17 Theory of Operation ...................................................................... 18 Amplifier Architecture .............................................................. 18 Gain Selection............................................................................. 18 Reference Terminal .................................................................... 18 Layout .......................................................................................... 19 Input Bias Current Return Path ............................................... 19 Input Protection ......................................................................... 19 RF Interference ........................................................................... 20 Common-Mode Input Voltage Range ..................................... 20 Reducing Noise........................................................................... 20 Applications Information .............................................................. 21 Differential Output .................................................................... 21 Multiplexing................................................................................ 21 Using the AD8231 with Bipolar Supplies................................ 21 Sallen Key Filter.......................................................................... 22 Outline Dimensions ....................................................................... 23 Ordering Guide .......................................................................... 23
REVISION HISTORY
9/07--Rev. 0to Rev. A Changes to Features and General Description ............................. 1 Changes to Table 2............................................................................ 3 Changes to Table 3............................................................................ 5 Changes to Typical Performance Characteristics Layout............ 9 Inserted Figure 3 to Figure 8; Renumbered Sequentially............ 9 Inserted Figure 9; Renumbered Sequentially.............................. 10 Inserted Figure 16, and Figure 18 to Figure 20; Renumbered Sequentially ..................................................................................... 11 Inserted Figure 24; Renumbered Sequentially............................ 12 Deleted Figure 28 and Figure 29; Renumbered Sequentially ... 13 Inserted Figure 33 and Figure 34; Renumbered Sequentially... 14 Inserted Figure 41 to Figure 46; Renumbered Sequentially...... 16 Inserted Figure 48; Renumbered Sequentially............................ 17 Changes to Gain Selection Section and Figure 50 ..................... 18 Added Input Protection Section................................................... 19 Added Reducing Noise Section .................................................... 20 Changes to Multiplexing Section.................................................. 21 Added Using the AD8231 with Bipolar Supplies Section ......... 21 Added Sallen Key Filter Section ................................................... 22 Changes to Ordering Guide .......................................................... 23 5/07--Revision 0: Initial Version
Rev. A | Page 2 of 24
AD8231 SPECIFICATIONS
VS = 5 V, VREF = 2.5 V, G = 1, RL = 10 k, TA = 25C, unless otherwise noted. Table 2.
Parameter INSTRUMENTATION AMPLIFIER Offset Voltage Input Offset, VOSI Average Temperature Drift Output Offset, VOSO Average Temperature Drift Input Currents Input Bias Current Input Offset Current Gains Gain Error G=1 G = 2 to 128 Gain Drift G = 1 to 32 G = 64 G = 128 Linearity CMRR G=1 G=2 G=4 G=8 G = 16 G = 32 G = 64 G = 128 Noise Input Voltage Noise, eni TA = -40C to +125C 1, 2, 4, 8, 16, 32, 64, or 128 Conditions VOS RTI = VOSI + VOSO/G TA = -40C to +125C TA = -40C to +125C 4 0.01 15 0.05 250 TA = -40C to +125C 20 15 0.05 30 0.5 500 5 100 0.5 V V/C V V/C pA nA pA nA Min Typ Max Unit
0.05 0.8 TA = -40C to +125C 3 4 10 3 5 80 86 92 98 104 110 110 110 en = (eni2 + (eno/G)2), VIN+, VIN- = 2.5 V f = 1 kHz f = 1 kHz, TA = -40C f = 1 kHz, TA = 125C f = 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz, TA = -40C f = 1 kHz, TA = 125C f = 0.1 Hz to 10 Hz f = 10 Hz 32 27 39 0.7 58 50 70 1.1 20 10||5 115 4.95 28 -0.2 +5.2 10 20 30
% % ppm/C ppm/C ppm/C ppm ppm dB dB dB dB dB dB dB dB nV/Hz nV/Hz nV/Hz V p-p nV/Hz nV/Hz nV/Hz V p-p fA/Hz G||pF dB V k V
0.2 V to 4.8 V, 10 k load 0.2 V to 4.8 V, 2 k load
Output Voltage Noise, eno
Current Noise Other Input Characteristics Common-Mode Input Impedance Power Supply Rejection Ratio Input Operating Voltage Range Reference Input Input Impedance Voltage Range
100 0.05
Rev. A | Page 3 of 24
AD8231
Parameter Dynamic Performance Bandwidth G=1 G=2 Gain Bandwidth Product G = 4 to 128 Slew Rate Output Characteristics Output Voltage High Output Voltage Low Short-Circuit Current Digital Interface Input Voltage Low Input Voltage High Setup Time to CS High Hold Time after CS High OPERATIONAL AMPLIFIER Input Characteristics Offset Voltage, VOS Temperature Drift Input Bias Current Input Offset Current TA = -40C to +125C Input Voltage Range Open-Loop Gain Common-Mode Rejection Ratio Power Supply Rejection Ratio Voltage Noise Density Voltage Noise Dynamic Performance Gain Bandwidth Product Slew Rate Output Characteristics Output Voltage High Output Voltage Low Short-Circuit Current BOTH AMPLIFIERS Power Supply Quiescent Current Quiescent Current (Shutdown) 0.05 100 100 100 f = 0.1 Hz to 10 Hz 120 120 110 20 0.4 1 0.5 RL = 100 k to ground RL = 10 k to ground RL = 100 k to 5 V RL = 10 k to 5 V 4.9 4.8 4.96 4.92 60 80 70 Conditions Min Typ Max Unit
2.7 2.5 7 1.1 RL = 100 k to ground RL = 10 k to ground RL = 100 k to 5 V RL = 10 k to 5 V 4.9 4.8 4.94 4.88 60 80 70
MHz MHz MHz V/s V V mV mV mA V V ns ns
100 200
TA = -40C to +125C TA = -40C to +125C TA = -40C to +125C TA = -40C to +125C
1.0 4.0 50 20
TA = -40C to +125C TA = -40C to +125C
5 0.01 250 20
15 0.06 500 5 100 0.5 4.95
V V/C pA nA pA nA V V/mV dB dB nV/Hz V p-p MHz V/s V V mV mV mA
100 200
4 0.01
5 1
mA A
Rev. A | Page 4 of 24
AD8231
VS = 3.0 V, VREF = 1.5 V, TA = 25C, G = 1, RL = 10 k, unless otherwise noted. Table 3.
Parameter INSTRUMENTATION AMPLIFIER Offset Voltage Input Offset, VOSI Average Temperature Drift Output Offset, VOSO Average Temperature Drift Input Currents Input Bias Current Input Offset Current Gains Gain Error G=1 G = 2 to 128 Gain Drift G = 1 to 32 G = 64 G = 128 CMRR G=1 G=2 G=4 G=8 G = 16 G = 32 G = 64 G = 128 Noise Input Voltage Noise, eni TA = -40C to +125C 1, 2, 4, 8, 16, 32, 64, or 128 Conditions VOS RTI = VOSI + VOSO/G 4 0.01 15 0.05 250 TA = -40C to +125C 20 15 0.05 30 0.5 500 5 100 0.5 V V/C V V/C pA nA pA nA Min Typ Max Unit
0.05 0.8 TA = -40C to +125C 3 4 10 80 86 92 98 104 110 110 110 en = (eni2 + (eno/G)2) VIN+, VIN- = 2.5 V, TA = 25C f = 1 kHz f = 1 kHz, TA = -40C f = 1 kHz, TA = 125C f = 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz, TA = -40C f = 1 kHz, TA = 125C f = 0.1 Hz to 10 Hz f = 10 Hz 10 20 30
% % ppm/C ppm/C ppm/C dB dB dB dB dB dB dB dB
Output Voltage Noise, eno
Current Noise Other Input Characteristics Common-Mode Input Impedance Power Supply Rejection Ratio Input Operating Voltage Range Reference Input Input Impedance Voltage Range
40 35 48 0.8 72 62 83 1.4 20 10||5 115 2.95 28 -0.2 +3.2
nV/Hz nV/Hz nV/Hz V p-p nV/Hz nV/Hz nV/Hz V p-p fA/Hz G||pF dB V k||pF V
100 0.05
Rev. A | Page 5 of 24
AD8231
Parameter Dynamic Performance Bandwidth G=1 G=2 Gain Bandwidth Product G = 4 to 128 Slew Rate Output Characteristics Output Voltage High Output Voltage Low Short-Circuit Current Digital Interface Input Voltage Low Input Voltage High Setup Time to CS High Hold Time after CS High OPERATIONAL AMPLIFIERS Input Characteristics Offset Voltage, VOS Temperature Drift Input Bias Current Input Offset Current TA = -40C to +125C Input Voltage Range Open-Loop Gain Common-Mode Rejection Ratio Power Supply Rejection Ratio Voltage Noise Density Voltage Noise Dynamic Performance Gain Bandwidth Product Slew Rate Output Characteristics Output Voltage High Output Voltage Low Short-Circuit Current BOTH AMPLIFIERS Power Supply Quiescent Current Quiescent Current (Shutdown) 0.05 100 100 100 f = 0.1 Hz to 10 Hz 120 120 110 27 0.6 1 0.5 RL = 100 k to ground RL = 10 k to ground RL = 100 k to 3 V RL = 10 k to 3 V 2.9 2.8 2.96 2.82 60 80 40 Conditions Min Typ Max Unit
2.7 2.5 7 1.1 RL = 100 k to ground RL = 10 k to ground RL = 100 k to 3 V RL = 10 k to 3 V 2.9 2.8 2.94 2.88 60 80 40
MHz MHz MHz V/s V V mV mV mA V V ns ns
100 200
TA = -40C to +125C TA = -40C to +125C TA = -40C to +125C TA = -40C to +125C
0.7 2.3 60 20
TA = -40C to +125C TA = -40C to +125C
5 0.01 250 20
15 0.06 500 5 100 0.5 2.95
V V/C pA nA pA nA V V/mV dB dB nV/Hz V p-p MHz V/s V V mV mV mA
100 200
3.5 0.01
4.5 1
mA A
Rev. A | Page 6 of 24
AD8231 ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter Supply Voltage Output Short-Circuit Current Input Voltage (Common-Mode) Differential Input Voltage Storage Temperature Range Operational Temperature Range Package Glass Transition Temperature ESD (Human Body Model) ESD (Charged Device Model) ESD (Machine Model)
1
THERMAL RESISTANCE
Rating 6V Indefinite1 -VS - 0.3 V to +VS + 0.3 V -VS - 0.3 V to +VS + 0.3 V -65C to +150C -40C to +125C 130C 1.5 kV 1.5 kV 0.2 kV
Table 5.
Thermal Pad Soldered to Board Not Soldered to Board JA 54 96 Unit C/W C/W
The JA values in Table 5 assume a 4-layer JEDEC standard board. If the thermal pad is soldered to the board, it is also assumed it is connected to a plane. JC at the exposed pad is 6.3C/W.
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation for the AD8231 is limited by the associated rise in junction temperature (TJ) on the die. At approximately 130C, which is the glass transition temperature, the plastic changes its properties. Even temporarily exceeding this temperature limit may change the stresses that the package exerts on the die, permanently shifting the parametric performance of the amplifiers. Exceeding a temperature of 130C for an extended period can result in a loss of functionality.
For junction temperatures between 105C and 130C, short-circuit operation beyond 1000 hours can impact part reliability.
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ESD CAUTION
Rev. A | Page 7 of 24
AD8231 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
16 A2 15 A1 13 CS 14 A0
NC 1 (IN-AMP -IN) -INA 2 (IN-AMP +IN) +INA 3 NC 4 NC = NO CONNECT
PIN 1 INDICATOR
12 +VS 11 -VS 10 OUTA (IN-AMP OUT) 9 REF
AD8231
TOP VIEW (Not to Scale)
(OP AMP OUT) OUTB 8
+INB 6
-INB 7
SDN 5
Figure 2. Pin Configuration
Table 6. Pin Function Descriptions
Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Mnemonic NC -INA (IN-AMP -IN) +INA (IN-AMP +IN) NC SDN +INB -INB OUTB (OP AMP OUT) REF OUTA (IN-AMP OUT) -VS +VS CS A0 A1 A2 Description No Connect. Instrumentation Amplifier Negative Input. Instrumentation Amplifier Positive Input. No Connect. Shutdown. Operational Amplifier Positive Input. Operational Amplifier Negative Input. Operational Amplifier Output. Instrumentation Amplifier Reference Pin. It should be driven with a low impedance. Output is referred to this pin. Instrumentation Amplifier Output. Negative Power Supply. Connect to ground in single-supply applications. Positive Power Supply. Chip Select. Enables digital logic interface. Gain Setting Bit (LSB). Gain Setting Bit. Gain Setting Bit (MSB).
Rev. A | Page 8 of 24
06586-002
AD8231 TYPICAL PERFORMANCE CHARACTERISTICS
INSTRUMENTATION AMPLIFIER PERFORMANCE CURVES
1000 N: 5956 MEAN: 0.977167 SD: 11.8177
1400 N: 5956 MEAN: -48.0779 1200 SD: 21.0433 1000
800
600
HITS
HITS
800 600 400
400
200
200
06586-100
-80
-60
-40
-20
0
20
40
60
80
100
0
100
200
300
400
500
CMRR (V/V)
GAIN ERROR (V/V)
Figure 3. Instrumentation Amplifier CMR Distribution, G = 1
800
Figure 6. Instrumentation Amplifier Gain Distribution, G = 1
9 8 7 6 5 4 3 2 1
06586-104 06586-105
N: 5956 MEAN: 2.06788 700 SD: 1.07546
NUMBER OF AMPLIFIERS
N: 40 MEAN: -8.31 SD: 6
600 500
HITS
400 300 200 100 0 -15
06586-101
0 -50 -40 -30 -20 -10 0 10 20 30 40 50 INPUT OFFSET DRIFT (nV/C)
-10
-5
0 VOSI (V)
5
10
15
Figure 4. Instrumentation Amplifier Input Offset Voltage Distribution
800
Figure 7. Instrumentation Amplifier Input Offset Voltage Drift, -40C to +125C
16 N: 40 MEAN: -0.003 14 SD: 0.061
NUMBER OF AMPLIFIERS
N: 5956 MEAN: 10.3901 700 SD: 3.9553 600 500
12 10 8 6 4 2 0 -0.5
HITS
400 300 200 100 0 -30
-20
-10
0 VOSO (V)
10
20
30
06586-102
-0.4 -0.3 -0.2 -0.1
0
0.1
0.2
0.3
0.4
0.5
OUTPUT OFFSET DRIFT (V/C)
Figure 5. Instrumentation Amplifier Output Offset Voltage Distribution
Figure 8. Instrumentation Amplifier Output Offset Drift, -40C to +125C
Rev. A | Page 9 of 24
06586-103
0 -100
0 -500 -400 -300 -200 -100
AD8231
2000
INPUT COMMON-MODE VOLTAGE (V)
VREF = MIDSUPPLY VCM = MIDSUPPLY
6 0V, 4.96V 5
1500
BIAS CURRENT (pA)
4 5V SINGLE SUPPLY 3 4.92V, 2.5V
1000
500
2
0V, 2.96V 3V SINGLE SUPPLY
0
3V 5V
06586-106
1
0V, 0.04V
2.92V, 1.5V
-20
0
20
40
60
80
100
120
0
1
2
3
4
5
6
TEMPERATURE (C)
OUTPUT VOLTAGE (V)
Figure 9. Instrumentation Amplifier Bias Current vs. Temperature
Figure 12. Instrumentation Amplifier Input Common-Mode Range vs. Output Voltage, VREF = 0 V
6
INPUT COMMON-MODE VOLTAGE (V)
2.0 1.5 1.0
BIAS CURRENT (nA)
5 4 0.02V, 4.22V
1.5V, 4.96V
0.5 0 -0.5 -1.0 -1.5 -2.0 -2.5 +VS = +2.5V -VS = -2.5V VREF = 0V
06586-006
5V SINGLE SUPPLY 1.5V, 2.96V 4.98V, 3.22V
3 2 0.02V, 2.22V
2.98V, 2.22V 3V SINGLE SUPPLY
4.98V, 1.78V
1
0.02V, 0.78V
2.98V, 0.78V 1.5V, 0.04V
-2.0
-1.5
-1.0
-0.5
0 VCM (V)
0.5
1.0
1.5
2.0
2.5
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
OUTPUT VOLTAGE (V)
Figure 10. Instrumentation Amplifier Bias Current vs. Common-Mode Voltage, 5 V
1.0
Figure 13. Instrumentation Amplifier Input Common-Mode Range vs. Output Voltage, VREF = 1.5 V
6
INPUT COMMON-MODE VOLTAGE (V)
0.8 0.6
BIAS CURRENT (nA)
5
2.5V, 4.96V 5V SINGLE SUPPLY
0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 -1.5 -1.2 -0.9 -0.6 -0.3 0 VCM (V) 0.3 0.6 +VS = +1.5V -VS = -1.5V VREF = 0V
06586-007
4 0.02V, 3.72V 3 2.5V, 2.96V 2 0.02V, 1.72V 1 0.02V, 1.28V 0 0 0.5 1.0 1.5 2.0 2.5 2.5V, 0.04V 2.98V, 0.28V 3.0 3.5 4.0 4.5 5.0
06586-005
4.98V, 3.72V
2.98V, 2.72V
3V SINGLE SUPPLY
4.98V,1.28V
0.9
1.2
1.5
OUTPUT VOLTAGE (V)
Figure 11. Instrumentation Amplifier Bias Current vs. Common-Mode Voltage, 3 V
Figure 14. Instrumentation Amplifier Input Common-Mode Range vs. Output Voltage, VREF = 2.5 V
Rev. A | Page 10 of 24
06586-004
0
06586-003
-500 -40
0
AD8231
50 40 30 20
GAIN (dB)
G = 128 G = 64 G = 32 G = 16 G=8 G=2 G=1
CMRR (V/V)
20 15 10 5 0 -5 -10 -15 REPRESENTATIVE SAMPLES -20 -40 -20 0 20 40
G G G G G G
=1 =1 =8 =8 = 128 = 128
G=4 10 0 -10 -20 -30 -40 100
06586-009
1k
10k
100k
1M
10M
60
80
100
120
FREQUENCY (Hz)
TEMPERATURE (C)
Figure 15. Instrumentation Amplifier Gain vs. Frequency
1000 800 600
GAIN DRIFT (ppm)
Figure 18. Instrumentation Amplifier CMRR vs. Temperature
140 120 G=8 100 G = 128 80 60 40 20 0 1 10 100 1k 10k 100k FREQUENCY (Hz)
200 0 -200 -400 -600 -800 -20 0 20 40 60 80 100 120
06586-116
TEMPERATURE (C)
Figure 16. Instrumentation Amplifier Gain Drift vs. Temperature
140 G = 128
Figure 19. Instrumentation Amplifier Positive PSRR vs. Frequency
140 120 G=1 G=8
120 G=8
CMRR (dB)
100 G=1 80
NEGATIVE PSRR (dB)
100 80 G = 128 60 40 20
60
100
1k FREQUENCY (Hz)
10k
100k
06586-010
1
10
100
1k
100k
100k
FREQUENCY (Hz)
Figure 17. Instrumentation Amplifier CMRR vs. Frequency
Figure 20. Instrumentation Amplifier Negative PSRR vs. Frequency
Rev. A | Page 11 of 24
06586-147
40 10
0
06586-146
-1000 -40
POSITIVE PSRR (dB)
400
G G G G G G G G
=1 =2 =4 =8 = 16 = 32 = 64 = 128
G=1
06586-118
AD8231
100
G = +128, 0.4V/DIV
CURRENT NOISE (pA/ Hz)
06586-012
10
1
G = +1, 1V/DIV
0.1
1s/DIV
1
10
100
1k
10k
100k
FREQUENCY (Hz)
Figure 21. Instrumentation Amplifier 0.1 Hz to 10 Hz Noise
100 90 80 70
Figure 24. Instrumentation Amplifier Current Noise Spectral Density
G = +1 G = +8 G = +128
NOISE (nV/ Hz)
60 50 40 30 20 10 1 10 100 FREQUENCY (Hz) 1k
06586-011
06586-013
0
20mV/DIV
5s/DIV
Figure 22. Instrumentation Amplifier Voltage Noise Spectral Density vs. Frequency, 5 V, 1 Hz to 1000 Hz
1000 900 800 700 G = +1 G = +8 G = +128
Figure 25. Instrumentation Amplifier Small Signal Pulse Response, G = 1, RL = 2 k, CL = 500 pF
300pF NO LOAD
500pF
800pF
NOISE (nV/ Hz)
600 500 400 300 200 100 1 10 100 1k 10k 100k
06586-008
06586-014
0 FREQUENCY (Hz)
20mV/DIV
4s/DIV
Figure 23. Instrumentation Amplifier Voltage Noise Spectral Density vs. Frequency, 5 V, 1 Hz to 1 MHz
Figure 26. Instrumentation Amplifier Small Signal Pulse Response for Various Capacitive Loads, G = 1
Rev. A | Page 12 of 24
06586-107
0.01
AD8231
G = +8
G = +32 G = +128
2V/DIV
17.6s TO 0.01% 21.4s TO 0.001%
06586-015
20mV/DIV
10s/DIV
0.001%/DIV
100s/DIV
Figure 27. Instrumentation Amplifier Small Signal Pulse Response, G = 4, 16, and 128, RL = 2 k, CL = 500 pF
Figure 30. Instrumentation Amplifier Large Signal Pulse Response, G = 128, VS = 5 V
25
20
SETTLING TIME (s)
0.001% 15 0.01% 10
2V/DIV
3.95s TO 0.01% 4s TO 0.001%
5
06586-016
0.001%/DIV
10s/DIV
1
10 GAIN (V/V)
100
1k
Figure 28. Instrumentation Amplifier Large Signal Pulse Response, G = 1, VS = 5 V
25
Figure 31. Instrumentation Amplifier Settling Time vs. Gain for a 4 V p-p Step, VS = 5 V
0.001% 20
SETTLING TIME (s)
15 0.01% 10
2V/DIV
3.75s TO 0.01% 3.8s TO 0.001%
5
06586-017
0.001%/DIV
10s/DIV
1
10 GAIN (V/V)
100
1k
Figure 29. Instrumentation Amplifier Large Signal Pulse Response, G = 8, VS = 5 V
Figure 32. Instrumentation Amplifier Settling Time vs. Gain for a 2 V p-p Step, VS = 3 V
Rev. A | Page 13 of 24
06586-020
0
06586-019
0
06586-018
AD8231
+VS -0.2
OUTPUT VOLTAGE SWING (V) REFERRED TO SUPPLY VOLTAGES
-0.4 -0.6 -0.8 -1.0 1.0 0.8 0.6 0.4 0.2
OUTPUT VOLTAGE SWING (V) REFERRED TO SUPPLY VOLTAGES
-40C +25C +85C +125C
+VS -0.2 -0.4 -0.6 -0.8 -1.0 1.0 0.8 0.6 0.4 0.2
06586-133
-40C +25C +85C +125C
1
10
100
1
10
100
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
Figure 33. Instrumentation Amplifier Output Voltage Swing vs. Output Current, VS = 3 V
Figure 34. Instrumentation Amplifier Output Voltage Swing vs. Output Current, VS = 5 V
Rev. A | Page 14 of 24
06586-134
-VS 0.1
-VS 0.1
AD8231
OPERATIONAL AMPLIFIER PERFORMANCE CURVES
100 -90
OPEN-LOOP PHASE SHIFT (Degrees)
80
OPEN-LOOP GAIN (dB)
-100
NO LOAD
60
-110
40 76 PHASE MARGIN 20
-120
300pF 800pF 1nF 1.5nF 20mV/DIV 5s/DIV
06586-024
-130
0 RL = 10k CL = 200pF 100 1k 10k 100k 1M
-140
FREQUENCY (Hz)
06586-021
-20 10
-150 10M
Figure 35. Operational Amplifier Open-Loop Gain and Phase vs. Frequency, VS = 5 V
100 -90
OPEN-LOOP PHASE SHIFT (Degrees)
Figure 38. Operational Amplifier Small Signal Response for Various Capacitive Loads, VS = 3 V
80
OPEN-LOOP GAIN (dB)
-100
OUTPUT VOLTAGE (0.5V/DIV)
NO LOAD
60
-110
1nF2k
40 72 PHASE MARGIN 20
-120
1.5nF2k
-130
0 RL = 10k CL = 200pF 100 1k 10k 100k 1M
-140
06586-022
FREQUENCY (Hz)
TIME (5s/DIV)
Figure 36. Operational Amplifier Open-Loop Gain and Phase vs. Frequency, VS = 3 V
800pF NO LOAD 1nF 2nF
Figure 39. Operational Amplifier Large Signal Transient Response, VS = 5 V
NO LOAD
OUTPUT VOLTAGE (0.5V/DIV)
1nF2k
1.5nF2k
1.5nF
TIME (5s/DIV)
Figure 37. Operational Amplifier Small Signal Response for Various Capacitive Loads, VS = 5 V
Figure 40. Operational Amplifier Large Signal Transient Response, VS = 3 V
Rev. A | Page 15 of 24
06586-026
20mV/DIV
5s/DIV
06586-023
06586-025
-20 10
-150 10M
AD8231
1000 900
+VS -0.2 OUTPUT VOLTAGE SWING (V) REFERRED TO SUPPLY VOLTAGES -0.4 -0.6 -0.8 -1.0 1.0 0.8 0.6 0.4 0.2
06586-141
SPECTRAL NOISE DENSITY (nV/ Hz)
800 700 600 500 400 300 200 100 0 1 10 100 1k 10k 100k FREQUENCY (Hz)
-40C +25C +85C +125C
1
10
100
OUTPUT CURRENT (mA)
Figure 41. Operational Amplifier Voltage Spectral Noise Density vs. Frequency
2.2 2.0 1.8 1.6
BIAS CURRENT (nA) OUTPUT VOLTAGE SWING (V) REFERRED TO SUPPLY VOLTAGES
Figure 44. Operational Amplifier Output Voltage Swing vs. Output Current, VS = 3 V
+VS -0.2 -0.4 -0.6 -0.8 -1.0 1.0 0.8 0.6 0.4 0.2 -40C +25C +85C +125C
1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 -0.2 -40 3V 5V
06586-108
-25
-10
5
20
35
50
65
80
95
110
125
1
10
100
TEMPERATURE (C)
OUTPUT CURRENT (mA)
Figure 42. Operational Amplifier Bias Current vs. Temperature
400 300 200
BIAS CURRENT (pA)
Figure 45. Operational Amplifier Output Voltage Swing vs. Output Current, VS = 5 V
140 +PSRR 120 100
PSRR (dB)
100 0 -100 VS = 1.5V -200 -300 -400 -3 VS = 2.5V
80 -PSRR 60 40 20 0 1 10 100 1k 10k 100k FREQUENCY (Hz)
-2
-1
0 VCM (V)
1
2
3
06586-109
Figure 43. Operational Amplifier Bias Current vs. Common Mode
Figure 46. Operational Amplifier Power Supply Rejection Ratio
Rev. A | Page 16 of 24
06586-148
06586-145
-VS 0.1
06586-144
-VS 0.1
AD8231
PERFORMANCE CURVES VALID FOR BOTH AMPLIFIERS
7 6 5
ISUPPLY (mA)
160 +125C
CHANNEL SEPARATION (dB)
G=8
G = 128
140 120 100 80 60 40 20 0 10 SOURCE CHANNEL: OP AMP AT G = 1 100 1k FREQUENCY (Hz) 10k 100k
06586-149
+85C +25C 4 -40C 3 2 1 0 2.7
G=1
VSUPPLY (V)
Figure 47. Supply Current vs. Supply Voltage
06586-028
3.1
3.5
3.9
4.3
4.7
5.1
5.5
5.9
Figure 48. Channel Separation vs. Frequency
Rev. A | Page 17 of 24
AD8231 THEORY OF OPERATION
CS A0 A1 A2 SDN OUTB -INA A1 14k 14k A4 +INB A3 14k 14k OUTA -INB
A2 +INA
AD8231
+VS -VS REF
06586-031
Figure 49. Simplified Schematic
AMPLIFIER ARCHITECTURE
The AD8231 is based on the classic 3-op amp topology. This topology has two stages: a preamplifier to provide amplification, followed by a difference amplifier to remove the common-mode voltage. Figure 49 shows a simplified schematic of the AD8231. The preamp stage is composed of Amplifier A1, Amplifier A2, and a digitally controlled resistor network. The second stage is a gain of 1 difference amplifier composed of Amplifier A3 and four 14 k resistors. A1, A2, and A3 are all zero drift, rail-torail input, rail-to rail-output amplifiers. The AD8231 design makes it extremely robust over temperature. The AD8231 uses an internal thin film resistor to set the gain. Because all of the resistors are on the same die, gain temperature drift performance and CMRR drift performance are better than can be achieved with topologies using external resistors. The AD8231 also uses an auto-zero topology to null the offsets of all its internal amplifiers. Because this topology continually corrects for any offset errors, offset temperature drift is nearly nonexistent. The AD8231 also includes a free operational amplifier. Like the other amplifiers in the AD8231, it is a zero drift, rail-to-rail input, rail-to-rail output architecture.
Table 7. Truth Table for AD8231 Gain Settings
CS Low Low Low Low Low Low Low Low High A2 Low Low Low Low High High High High X A1 Low Low High High Low Low High High X A0 Low High Low High Low High Low High X Gain 1 2 4 8 16 32 64 128 No change
REFERENCE TERMINAL
The output voltage of the AD8231 is developed with respect to the potential on the reference terminal, which is useful when the output signal needs to be offset to a midsupply level. For example, a voltage source can be tied to the REF pin to levelshift the output so that the AD8231 can drive a single-supply ADC. The REF pin is protected with ESD diodes and should not exceed either +VS or -VS by more than 0.3 V. For best performance, source impedance to the REF terminal should be kept below 1 . As shown in Figure 49, the reference terminal, REF, is at one end of a 14 k resistor. Additional impedance at the REF terminal adds to this 14 k resistor and results in amplification of the signal connected to the positive input, causing a CMRR error.
INCORRECT CORRECT
GAIN SELECTION
The gain of the AD8231 is set by voltages applied to the A0, A1, and A2 pins. To change the gain, the CS pin must be driven low. When the CS pin is driven high, the gain is latched, and voltages at the A0 to A2 pins have no effect. Because the CS pin is level sensitive rather than edge sensitive, it can also be tied permanently low. Table 7 shows the different gain settings. The time required for a gain change is dominated by the settling time of the amplifier. The AD8231 takes about 200 ns to switch gains, after which the amplifier begins to settle. Refer to Figure 28 through Figure 32 to determine the settling time for different gains.
+
+
AD8231
VREF
IN-AMP - REF
AD8231
VREF
IN-AMP - REF
+
AD8231
06586-032
OP AMP -
Figure 50. Driving the Reference (REF)
Rev. A | Page 18 of 24
AD8231
LAYOUT
The AD8231 is a high precision device. To ensure optimum performance at the PCB level, care must be taken in the design of the board layout. The AD8231 pinout is arranged in a logical manner to aid in this task.
INCORRECT
+VS
CORRECT
+VS
AD8231
REF
AD8231
REF
Power Supplies
The AD8231 should be decoupled with a 0.1 F bypass capacitor between the two supplies. This capacitor should be placed as close as possible to Pin 11 and Pin 12, either directly next to the pins or beneath the pins on the backside of the board. The auto-zero architecture of the AD8231 requires a low ac impedance between the supplies. Long trace lengths to the bypass capacitor increase this impedance, which results in a larger input offset voltage. A stable dc voltage should be used to power the instrumentation amplifier. Noise on the supply pins can adversely affect performance.
-VS TRANSFORMER +VS
-VS TRANSFORMER +VS
AD8231
REF 10M -VS THERMOCOUPLE +VS C 1 fHIGH-PASS = 2RC REF C R C R
AD8231
REF
Package Considerations
The AD8231 comes in a 4 mm x 4 mm LFCSP. Beware of blindly copying the footprint from another 4 mm x 4 mm LFCSP part; it cannot have the same thermal pad size and leads. Refer to the Outline Dimensions section to verify that the PCB symbol has the correct dimensions. Space between the leads and thermal pad should be kept as wide as possible for the best bias current performance.
-VS THERMOCOUPLE +VS
AD8231
C
AD8231
REF
Thermal Pad
The AD8231 4 mm x 4 mm LFCSP comes with a thermal pad. This pad is connected internally to -VS. The pad can either be left unconnected or connected to the negative supply rail. For high vibration applications, a landing is recommended. Because the AD8231 dissipates little power, heat dissipation is rarely an issue. If improved heat dissipation is desired (for example, when ambient temperatures are near 125C or when driving heavy loads), connect the thermal pad to the negative supply rail. For the best heat dissipation performance, the negative supply rail should be a plane in the board. See the Thermal Resistance section for thermal coefficients with and without the pad soldered.
-VS CAPACITIVELY COUPLED
CAPACITIVELY COUPLED
Figure 51. Creating an IBIAS Path
INPUT PROTECTION
All terminals of the AD8231 are protected against ESD. In addition, the input structure allows for dc overload conditions a diode drop above the positive supply and a diode drop below the negative supply. Voltages beyond these limits cause the ESD diodes to conduct and current to flow. If overvoltage events are anticipated, an external resistor should be used in series with each of the inputs to limit the current to below 10 mA. Currents up to 100 mA can be sustained for a few seconds. Note that if either input is brought below the negative supply to the point where the ESD diode turns on, the AD8231 output can phase-reverse.
INPUT BIAS CURRENT RETURN PATH
The input bias current of the AD8231 must have a return path to common. When the source, such as a thermocouple, cannot provide a return current path, one should be created, as shown in Figure 51.
Rev. A | Page 19 of 24
06586-033
-VS
AD8231
RF INTERFERENCE
RF rectification is often a problem when amplifiers are used in applications where there are strong RF signals. The disturbance can appear as a small dc offset voltage. High frequency signals can be filtered with a low-pass, RC network placed at the input of the instrumentation amplifier, as shown in Figure 52. The filter limits the input signal bandwidth according to the following relationship
If more common-mode range is required, the simplest solution is to apply less gain in the instrumentation amplifier. The extra op amp can be used to provide another gain stage after the in-amp. Because the AD8231 has good offset and noise performance at low gains, applying less gain in the instrumentation amplifier generally has a limited impact on the overall system performance.
REDUCING NOISE
Because the AD8231 has no 1/f noise, reducing the bandwidth corresponds directly to less noise. Table 8 shows the AD8231 performance at a gain of 1 at different bandwidths, assuming a 2-pole Butterworth filter roll off.
Table 8. AD8231 noise at various bandwidths
Bandwidth (Hz) 1 3.2 10 32 100 320 1k 3.2 k 10 k 32 k
1
FilterFreqDiff
1 = 2 R(2CD + CC )
1 2 RCC
+VS 0.1F CC 1nF 10F
FilterFreqCM = where CD 10CC.
R 4.02k CD 10nF R 4.02k CC 1nF
+INA
AD8231
REF -INA
VOUT
0.1F -VS
10F
06586-034
Noise (V rms) 0.07 0.12 0.21 0.37 0.66 1.17 2.07 3.71 6.55 11.73
SNR Single-Ended1 dB Bits 148.3 24.3 143.2 23.5 138.3 22.7 133.2 21.8 128.3 21.0 123.2 20.2 118.3 19.3 113.2 18.5 108.3 17.7 103.2 16.9
SNR Differential Output2 dB Bits 154.3 25.3 149.2 24.5 144.3 23.7 139.2 22.8 137.63 22.0 129.2 21.2 124.3 20.3 119.2 19.5 117.3 18.7 109.2 17.9
Figure 52. RFI Suppression
Figure 52 shows an example where the differential filter frequency is approximately 2 kHz, and the common-mode filter frequency is approximately 40 kHz. Values of R and CC should be chosen to minimize RFI. Mismatch between the R x CC at the positive input and the R x CC at the negative input degrades the CMRR of the AD8231. By using a value of CD that is ten times larger than the value of CC, the effect of the mismatch is reduced and performance is improved.
SNR for single-ended output configuration calculated with output signal of 4.8 V p-p, which corresponds to 1.697 V rms. 2 SNR for differential output configuration calculated with output signal of 9.6 V p-p, which corresponds to 3.397 V rms.
The AD8231 has two clocks: an auto-zero clock at 3.4 kHz and a commutating clock at 54 kHz. While the auto-zero clock has negligible energy and can generally be ignored, the commutating clock has enough energy to significantly affect the noise of the part. Therefore, in applications where low noise is critical, limiting the bandwidth of the system below 54 kHz is recommended.
COMMON-MODE INPUT VOLTAGE RANGE
The 3-op amp architecture of the AD8231 applies gain and then removes the common-mode voltage. Therefore, internal nodes in the AD8231 experience a combination of both the gained signal and the common-mode signal. This combined signal can be limited by the voltage supplies even when the individual input and output signals are not. To determine whether the signal could be limited, refer to Figure 12 through Figure 14 or use the following formula
- VS + 0.04 V < VCM
VDIFF x Gain 2
< + VS - 0.04 V
Rev. A | Page 20 of 24
AD8231 APPLICATIONS INFORMATION
DIFFERENTIAL OUTPUT
Figure 53 shows how to create a differential output in-amp using the AD8231 uncommitted op amp. Because this configuration makes use of the reference terminal of the in-amp, errors from the op amp and resistor mismatch result in common-mode errors, rather than differential errors. Because common-mode errors are typically rejected by the next device in the signal chain, this circuit configuration adds almost no extra error.
+IN 3 10
The outputs of both the AD8231 in-amp and op amp are high impedance in the shutdown state. This feature allows several AD8231s to be multiplexed together without any external switches. Figure 54 shows an example of such a configuration. All the outputs are connected together and only one amplifier is turned on at a time. This feature is analogous to the high-Z mode of the digital tristate logic. The resistors in the AD8231 instrumentation amplifier create a resistive path from the output to the reference pin of about 100 k. If a higher output impedance in shutdown mode is desired, the reference pin can be driven with the op amp of the AD8231. In this configuration, the output impedance in shutdown is several G, and many thousand AD8231s can theoretically be multiplexed in such a way. The AD8231 can enter and leave shutdown mode very quickly. However, when the amplifier wakes up and reconnects its input circuitry, the voltage at its internal input nodes changes dramatically. It takes time for the output of the amplifier to settle. Refer to Figure 28 through Figure 32 to determine the settling time for different gains. This settling time limits how quickly the AD8231 can be multiplexed with the SDN pin.
IN-AMP
-IN 2 REF 9
+OUT
4.99k 7 4.99k
VREF 6
+ - OP AMP
8
-OUT
Figure 53. Differential Output Using Operational Amplifier
MULTIPLEXING
SDN0
06586-035
USING THE AD8231 WITH BIPOLAR SUPPLIES
The AD8231 can be used with bipolar supplies as long as the maximum voltage drop between the supply rails is kept below 6 V and all input voltages are kept within the supply rails.
SDN1
With bipolar supplies, the acceptable levels for the digital inputs A0, A1, A2, CS, and SDN shift. Table 9 shows acceptable values for low and high signals for both single and dual supplies.
Table 9. Digital Pin Thresholds
Supply Voltage (V) 0 to 5 0 to 3 -2.5 to +2.5 -1.5 to +1.5 Low Min (V) Max (V) 0 +1 0 +0.8 -2.5 -1.5 -1.5 -0.7 High Min (V) Max (V) 4 5 2.2 3 1.5 2.5 0.7 1.5
SDN2
SDN3
Figure 54. Four AD8231s in Multiplexing Configuration
06586-036
Rev. A | Page 21 of 24
AD8231
When operating the AD8231 on dual supplies, a level-shift is typically needed from standard single-supply control logic. One easy way to accomplish the level-shift is through a single-pole, double-throw switch, such as the ADG633. Figure 55 shows an application schematic for 2.5 V operation.
VDIGITAL
Note that in addition to setting the peaking of the filter, the ratio R3/R4 also sets the dc gain: G = 1 + R3/R4. If lower dc gain is required, replace R1 with a voltage divider, where the output resistance of the divider is equal to the required value of R1. Figure 56 shows a bias point connected to R4 and the in-amp reference. The filter stage amplifies the signal around this bias point. The bias point is typically midsupply and should be low impedance.
Table 10. Recommended Component Values for Butterworth Low-Pass Filter in Figure 56
Sallen Key R1, R2 C1, C2 (k) (nF) 499 10 158 10 49.9 10 158 1 49.9 1 15.8 1 4.99 1 Optional Poles Before In-Amp After Op Amp R6, R7 C4 R5 C3 (k) (nF) (k) (nF) 499 4.7 49.9 100 158 4.7 16 100 49.9 4.7 4.99 100 158 0.47 1.6 100 49.9 0.47 0.499 100 15.8 0.47 0.16 100 4.99 0.47 0.049 100
SALLEN KEY (TWO POLE) R1 R2 C2 C1 OP AMP R3 R4 BIAS POINT
06586-056
VDD +2.5V -2.5V +2.5V -2.5V +2.5V VDIGITAL -2.5V VDD A0 A1 A2 EN A0 A1 A2 +VS SDN -VS CS -2.5V +2.5V
DIGITAL CONTROL
(FPGA, MICROCONTROLLER, ETC.) GND
ADG633
VSS GND
AD8231
3 dB Freq 32 Hz 100 Hz 320 Hz 1 kHz 3.2 kHz 10 kHz 32 kHz
-2.5V
06586-055
OPTIONAL POLE R6 R7 C4 IN-AMP REF BIAS POINT
OPTIONAL POLE
VDIGITAL IS THE DIGITAL SUPPLY VOLTAGE. IT CAN BE ANY VOLTAGE BETWEEN 2.5V AND 9.5V.
Figure 55. Converting Single-Supply Control Signals to Dual Supply.
R5 C3
SALLEN KEY FILTER
The extra op amp in the AD8231 can be used to create a 2-pole Sallen Key filter. Such a filter can remove excess noise or perform antialiasing before an analog-to-digital converter. Figure 56 shows how to create a 2-pole low-pass Butterworth filter. Components R1, R2, C1, and C2 set the frequency of the filter. The ratio of R3 and R4 sets the peaking of the filter. If R4 equals 10 k, R3 should equal 5.9 k for an optimum 2-pole response. Depending on the circuitry before and after the AD8231, a 3-pole filter can be possible. If the previous stage has a small output impedance, an additional pole can be added before the in amp (R6, R7, and C4). If the following stage has a high input impedance, an additional pole can be added after the op amp (R5 and C3). Peaking from the Sallen Key stage should be higher to compensate for the extra attenuation of the third pole; both R3 and R4 should be 10 k for optimum response.
Figure 56. Butterworth Low-Pass Filter (Dotted Sections Indicate Optional Poles)
Rev. A | Page 22 of 24
AD8231 OUTLINE DIMENSIONS
4.00 BSC SQ 0.60 MAX 0.60 MAX 0.65 BSC 3.75 BSC SQ 0.75 0.60 0.50
(BOTTOM VIEW)
PIN 1 INDICATOR
13 12
16
PIN 1 INDICATOR
1
TOP VIEW
2.25 2.10 SQ 1.95
5 4
9
8
0.25 MIN 1.95 BSC
12 MAX 1.00 0.85 0.80
0.80 MAX 0.65 TYP 0.05 MAX 0.02 NOM
COMPLIANT TO JEDEC STANDARDS MO-220-VGGC
Figure 57. 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 4 mm x 4 mm Body, Very Thin Quad (CP-16-4) Dimensions shown in millimeters
ORDERING GUIDE
Model AD8231ACPZ-R7 1 AD8231ACPZ-RL1 AD8231ACPZ-WP1 AD8231-EVALZ1
1
Temperature Range -40C to +125C -40C to +125C -40C to +125C
Package Description 16-Lead LFCSP_VQ, 7" Tape and Reel 16-Lead LFCSP_VQ, 13" Tape and Reel 16-Lead LFCSP_VQ, Waffle Pack Evaluation Board
021207-A
SEATING PLANE
0.35 0.30 0.25
0.20 REF
COPLANARITY 0.08
Package Option CP-16-4 CP-16-4 CP-16-4
Z = RoHS Compliant Part.
Rev. A | Page 23 of 24
AD8231 NOTES
(c)2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06586-0-9/07(A)
Rev. A | Page 24 of 24

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